![]() Quartus doesn't simulate - it starts with synthesis. (It's an answer to an exercise and for that reason I am not going to post all the code). ![]() This one doesn't do much the only mathematical operation it does is ADD. Now, of course, I don't know what your ALU actually does. Finally, I needed to combine the zero output from each. Notice also that I am not interested in the overflow output from the LSB ALU. The key thing to see is how I have connected the carry output of the first ALU to the carry input of the second. The 8 LSBs go to the first ALU the 8 MSBs go to the second. I'm sure you can convert it to 2x 4-bit ALU. I already had a 16-bit ALU prepared earlier, so I converted it to an 8-bit ALU and instantiated it twice to make the original 16-bit ALU (so I could run the same test on it to make sure I had done it correctly*). This shows two 8-bit ALUs connected together to make one 16-bit ALU. Signal zeroMSB: std_logic - because this ALU has a 'zero' output ![]() Signal INTERNAL_CARRY: std_logic - the carry chain Result : out std_logic_vector(15 downto 0) - result Op : in std_logic_vector(2 downto 0) - operator OpB : in std_logic_vector(15 downto 0) - operand B OpA : in std_logic_vector(15 downto 0) - operand A You say you have tried to find how to connect two 4-bit ALUs here is some help: library ieee The actual answer depends on the actual ALU you have and the method you choose.
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